GPS Receiver Chip eRideOPUS 5
Model ePV5900BDiscontinued Products
Ultra high-sensitivity, single-die GPS/A-GPS receiver chip
eRideOPUS 5 (ePV5900B) is a high-sensitivity
GPS/AGPS receiver System-in-a-Package (SiP) that combines single-die receiver with integrated flash memory. It delivers fast, accurate positioning data in challenging locations such as indoor environments and deep urban canyons.
Ultra-high Sensitivity: -161 dBm acquisition sensitivity ensures position fix availability indoors, outdoors and in urban canyons
Fast: <2 sec TTFF ensures user satisfaction
Easy Integration and Miniature Size: Optimized RF and Digital design ensures GPS performance while on-chip LNA minimizes BOM
Integrated Flash:Non-volatile storage for both aiding data and reprogrammable receiver software to ensure access to latest features and performance enhancements.
Supports WAAS:2 Channel capable SBAS (EGNOS, WAAS and MSAS)
Assisted GPS function is available.
Advanced Features:PPS output and Dead Reckoning for uninterrupted positioning
Configurable up to 5Hz
|GNSS Reception Capability||GPS L1 C/A, SBAS L1 C/A|
|GNSS Reception||14 channels (GPS, SBAS)|
|Update Rate||GNSS: 1 / 2 / 5 Hz|
Dead Reckoning: 1 Hz
Tracking: -161 dBm
Hot Start: -161 dBm
Warm Start: -147 dBm
Cold Start: -147 dBm
Reacquisition: -161 dBm
|Position Accuracy (Horizontal)||2.5m (CEP)|
|TTFF (Typical)||Hot Start: <2 sec (@-130 dBm)|
Warm Start: 33 sec (@-130 dBm)
Cold Start: 38 sec (@-130 dBm)
|Power Consumption||Acquisition Mode: 67 mW|
|Backup Supply||1.4 to 2.75VDC / 20 μA (Typ)|
|Operating Temperature||-40°C to +85°C|
|Package||Size: TFBGA 6.0mm x 6.0mm, Pins: 81balls, Ball Pitch: 0.5mm|
|Protocol||eSIP (NMEA 0183 Standard Ver 3.01)|
|Interfaces||UART, I2C, Forward/Reverse signal, Speed Pulse, Time Pulse, Clock|
* Specifications subject to change without notice.
©2014 FURUNO ELECTRIC CO.,LTD. All Rights Reserved.